Kernel driver `i2c-i801.o' Status: Tested and stable. Block reads/writes lightly tested. HW PEC support Beta. I2C Block Read support Beta. Supported adapters: * Intel 82801AA and 82801AB (ICH and ICH0 - part of the '810' and '810E' chipsets) * Intel 82801BA (ICH2 - part of the '815E' chipset) * Intel 82801CA/CAM (ICH3) * Intel 82801DB (ICH4) * Intel 82801EB/ER (ICH5) * Intel 6300ESB/ESB2 * Intel 82801FB/FR/FW/FRW (ICH6) * Intel ICH7/ICH8 Datasheets: Publicly available at the Intel website Authors: Frodo Looijaard , Philip Edelbrock , and Mark Studebaker Module Parameters ----------------- * force_addr: int Forcibly enable the ICH at the given address. EXTREMELY DANGEROUS! Description ----------- The ICH (properly known as the 82801AA), ICH0 (82801AB), ICH2 (82801BA), ICH3 (82801CA/CAM) and later devices are Intel chips that are a part of Intel's '810' chipset for Celeron-based PCs, '810E' chipset for Pentium-based PCs, '815E' chipset, and others. The ICH chips contain at least SEVEN separate PCI functions in TWO logical PCI devices. An output of lspci will show something similar to the following: 00:1e.0 PCI bridge: Intel Corporation: Unknown device 2418 (rev 01) 00:1f.0 ISA bridge: Intel Corporation: Unknown device 2410 (rev 01) 00:1f.1 IDE interface: Intel Corporation: Unknown device 2411 (rev 01) 00:1f.2 USB Controller: Intel Corporation: Unknown device 2412 (rev 01) 00:1f.3 Unknown class [0c05]: Intel Corporation: Unknown device 2413 (rev 01) The SMBus controller is function 3 in device 1f. Class 0c05 is SMBus Serial Controller. If you do NOT see the 24x3 device at function 3, and you can't figure out any way in the BIOS to enable it, (and especially if you have an Asus P4B board), see prog/hotplug/README.p4b. The ICH chips are quite similar to Intel's PIIX4 chip, at least in the SMBus controller. See the file i2c-piix4 for some additional information. Process Call Support -------------------- Not supported. I2C Block Read Support ---------------------- The ICH4 supports a special 3-byte address (command code plus 2 more bytes) I2C block read. The driver and the kernel i2c protocol stack do not support this. The ICH5 and higher support a standard 1-byte address (command code) I2C block read. The driver does support this. SMBus 2.0 Support ----------------- The 82801DB (ICH4) and later chips support several SMBus 2.0 features. Kernel and driver support are as follows: Feature Kernel Driver Slave mode no no Host notify no no Block PEC yes yes Hardware PEC yes yes Other ICH4 and later Features ----------------------------- The following additional features are also _not_ supported: 32 Byte buffer ********************** The lm_sensors project gratefully acknowledges the support of Texas Instruments in the initial development of this driver. The lm_sensors project gratefully acknowledges the support of Intel in the development of SMBus 2.0 / ICH4 features of this driver.